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AIX G5+: A novel 5 x 200 mm GaN/Si MOCVD reactor technology package

Based on the proven Planetary Reactor® concept, the AIX G5+ offers
- 5 x 200 mm capacity – the largest GaN/Si MOCVD reactor available
- Excellent uniformity with rotational symmetry pattern
- Precise management and minimization of the wafer bow
- Capability to use standard thickness 200 mm silicon wafers
- Lowest total cost of ownership


The design of the AIX G5+ is based on an exact analysis of the requirements and challenges related to a multi 200 mm GaN/Si MOCVD process. Fundamentally, two different challenges had to be met. First, the large wafer area requires novel ways to control and manage the gas phase, as this is key to a uniform and reproducible growth process, Second, silicon as a substrate behaves differently from sapphire during the epitaxy process. In particular, the tendency to bow the wafers needs to be managed as well as the reactivity of silicon with metals like gallium.

The AIX G5+ is based on the proven AIX G5 HT reactor, which provides excellent results in terms of uniformity, reproducibility and yield for 4” and 6” GaN on sapphire processes. Consequently, one of the key criteria for the design of the AIX G5+ was to maintain this excellent yield. As a result, special focus was put on the MOCVD reactor temperature management as well as on the delivery of precursors. Both had to be adopted and optimized to meet the special challenges that arise from the use of large-area substrates.

To achieve optimum uniformities across the entire batch of 5 x 200mm wafers, a precise control of the depletion of the gas phase is required. Based on extensive numerical modeling, a new precursor gas inlet was developed that opens a wide and flexible parameter window for process and device tuning.

An optimized RF heating coil was developed in order to enable highest temperature uniformities on all wafers as well as during the complete process cycle.

The intrinsic challenges of GaN growth on large-area Si substrates are a strong wafer bow, resulting in layer crack formation, and the reactivity of Ga with Si. To meet these challenges, special design features were implemented.

Ga easily forms an alloy with bare Si and thereby destroys the Si crystal structure at the surface of the Si wafer. This must be taken into account when designing an MOCVD reactor for mass manufacturing of GaN on Si-based devices. For example, residual Ga atoms available in a reactor from previous growth runs can re-evaporate during the heat-up phase of a following growth run, causing the undesired so-called meltback etching on the wafer. Therefore, methods must be developed to avoid Ga contact with the bare Si substrate. In the AIX G5+, a special method was developed resulting in a “reset” of the chamber with well-defined, reproducible and clean starting conditions. Apart from the avoidance of meltback etching, the reactor reset after each run delivers the best starting grounds for repeatable and stable run-to-run performance.

Managing the wafer bow is another critical issue. As a wafer bow leads to undesired wavelength non-uniformities, it needs to be addressed in the MOCVD process in order to achieve satisfying chip yields. Beyond that, a minimized final bow of the epi-grown and cooled-down wafer is required for high-yield wafer processing along the manufacturing chain, such as in lithography.

One physical mechanism that causes wafer bow is the existence of a thermal gradient perpendicular to the wafer surface. Such gradients exist in all MOCVD reactor, since the wafers are heated from the bottom side while the top side is exposed to a much colder ambient.

To minimize the wafer bow, the AIX G5+ features a warm reactor ceiling reducing the vertical heat flux through the wafer, thus enabling the use of standard thickness Si substrates.

Further bowing of the GaN/Si is caused by the differences of the thermal expansion coefficients of Si and Nitride layers. Depending on the reactor type, a wafer will bow with rotational symmetry (to the form of a bowl) or warp (resembling a potato chip). Only in the first case the distance between wafer edge and wafer carrier is the same along the wafer circumference, meaning that the temperature is the same and can be accounted for by recess designs. Thus achieving a rotational symmetry profile was a key target.

The desired rotational symmetry of the bow can only be achieved in Planetary Reactors such as the AIX G5+ (or in single wafer reactors which are not the preferred choice due to their low productivity). The AIX G5+ uses a proprietary double rotation setup, where every wafer experiences an environment similar to a single wafer reactor. The symmetry is not only beneficial for the epitaxial binning yield, but also causes less handling issues and yield loss in subsequent wafer processing steps.

All of these features are available in the AIX G5+. Existing AIX G5 HT system can be upgraded to this version, thus providing the highest possible flexibility.